介绍了一个峰保持电路.该电路适用于silicon strip,Si(Li),CdZnTe and CsI等探测器,实现采样一保持功能.已成功进行了基于CMOS FET的采样-保持电路的设计和仿真,通过使用Proteus的PSPICE仿真器和BSIMV3.3模型参数完成了电路性能的仿真.同时,实现了采样时间可在60ns到4.44μs范围内进行选择,该电路具有较好的线性.
In this paper,the objective is to realize a Track/Hold Circuit for silicon strip,Si(Li),CdZn Te and CsI detectors etc.By using CMOS transistor to implement various components in electronic circuit,the Track and Hold circuit only made with CMOS FET is succeeded to be designedand simulated.Performance was characterized using PSPICE simulator with BSIMV3.3 parametersof the Proteus.Several measurements of acquisition time can be made from 60 ns to 4.44μs related to the output resistance,and the integral nonlinearity is good.
参考文献
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