由于"Silicon Limit"的限制,VDMOS的导通电阻不能很大程度的降低,为了突破这一极限,超结VDMOS结构被采用,本文采用氮化硅硬掩模和高能硼注入在n型外延层中形成交替的p型区从而形成超结结构.利用ISE-TCAD模拟器进行工艺器件模拟,模拟结果表明击穿电压最大有40%的提高,同时导通电阻也有明显的降低.采用高能注入形成超结VDMOS为减小VDMOS导通电阻提供了一种切实有效的方法.
参考文献
| [1] | Kondekar P N;Parikih C D;Patil M B et al.Analysis of Breakdown voltage and on resistance of super-junction Power MOSFET CoolMOSTM using theory of novel voltage sustaining layer[J].Power electronics specialists conference,2002,4(23):1769-1775. |
| [2] | 田波,程序,亢宝位.超结理论的产生与发展[J].微电子学,2006(01):75-79,83. |
| [3] | 田波;亢宝位 .超结MOSFET的最新发展动向[J].电力电子,2001,2(04):15-20. |
| [4] | Jayant B;Baliga.Modern power devices[M].New York:Awiley-Interscience Publication,1987:62-63. |
| [5] | Permthammasin K;Wachuka G;schmitt M.Performance analysis of novel 600v Super-junction Power LDMOS Transistors with embedded P-type round pillars[J].Simulation of semiconductor processes and devices,2005:179-182. |
| [6] | Philips Semiconductors consumer systems.New benchmark for resurf,soi,and super-junction power devices[A].,2001:343346. |
| [7] | Lorenz L;Deboy G;Knapp A et al.COOLMOSTM-a new milestone in high voltage power mos[J].Power semiconductor devices and ics,1999,26(28):3-10. |
| [8] | Kondekar Pravin N et al.Simulation study of charge imbalance in super-junction power mosfet[J].Electron Devices and solid-state circuits,2005,19(21):551-554. |
| [9] | Praveen M Shenoy;Anup Bhalla;Gary M Dolny.Analysis of the effect of charge imbalance on the static and dynamic characteristics of the super junction MOSFET[J].Power semiconductor devices and ICs,1999:99-102. |
| [10] | Timothy Henson;Joe Cao.Low voltage super junction MOSFET simulation and experimentation[J].Power Semiconductor Devices and ICs,2003:37-40. |
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