This paper introduces a low-noise low-cost ∑ △ modulator for digital audio analog-to-digital conversion.By adopting a low-noise large-output swing operation amplifier,not only is the flicker noise greatly inhibited,but also the power consumption is reduced.Also the area cost is relatively small.The modulator was implemented in a SMIC standard 65-nm CMOS process.Measurement results show it can achieve 96 dB peak signal-to-noise plus distortion ratio (SNDR) and 105 dB dynamic range (DR) over the 22.05-kHz audio band and occupies 0.16 mm2.The power consumption of the proposed modulator is 4.9 mW from a 2.5 V power supply,which is suitable for high-performance,low-cost audio codec applications.
参考文献
[1] | Wu J Y,Zhang Z Y,Subramoniam R.A 107.4 dB SNR multi-bit sigma delta ADC with 1-PPM THD at 0.12 dB from full scale input.IEEE J Solid-State Circuits,2009,44(11):3060 |
[2] | Ranjbar M,Lahiji G R.A low power third order delta-sigrna modulator for digital audio applications.IEEE International Symposium on Circuits and Systems,Island of Kos Greece,2006:4759 |
[3] | Luo Hao,Han Yan,Chetng R C C.A high-performance,lowpower ∑ A ADC for digital audio applications.Journal of Semiconductors,2010,31(5):055009 |
[4] | Rabii S,Wooley B A.A 1.8-V digital-audio sigma-delta modulator in 0.8-μm CMOS.IEEE J Solid-State Circuits,1997,32(6):783 |
[5] | Liu Liyuan,Chen Liangdong,Li Dongmei.A 1.1 mV 87 dB dynamic range △ ∑ modulator for audio applications.Journal of Semiconductors,2010,31(5):055003 |
[6] | Banu M,Khoury J M,Tsividis Y.Fully differential operational amplifiers with accurate output balancing.IEEE J Solid-State Circuits,1988,23:1410 |
[7] | Del Mar Hershenson M,Boyd S P,Lee T H.Optimal design of a CMOS op-amp via geometric programming.IEEE Trans Computer-Aided Design of Integrated Circuits and Systems,2001,20:1 |
[8] | Fayomi C J B,Robers G W,Sawan M.Low-voltage CMOS analog bootstrapped switch for sample-and-hold circuit:design and chip characterization.IEEE international Symposium on Circuits and Systems,Kobe,2005:220 |
[9] | Mohieldin A N,Mekky R H,Emira A.A 0.9 mW microphone uplink system in 65 nm CMOS.IEEE International Symposium on Circuits and Systems.Taipei,Taiwan,2009:1149 |
[10] | Jarvinen J, Halonen K. A 1.2 V dual-mode GSM/WCDMA-modulator in 65 nm CMOS. Solid-State Circuits Conference,San Francisco,CA:S3 Digital Publishing,Inc,2006:1972 |
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