This paper presents a high linearity downconverter implemented in a 0.18μm CMOS process for long term evolution (LTE) receivers without a surface acoustic wave (SAW) filter.The proposed downconverter is composed of a transconductance (Gm) stage,a passive mixer,a current buffer,a transimpedance (TIA) stage,and a DC-offset cancellation (DCOC) loop.The current buffer is utilized to provide very low load impedance for the passive mixer at high frequencies and reduce the output voltage swing induced by out-of-band blockers.This technique improves the input referred third-order intercept point (IIP3) and second-order intercept point (IIP2) of the down-converter by 4.5 dB and 11 dB,respectively.The measured results show that the proposed downconverter achieves a voltage conversion gain of 29.5 dB,double sideband noise figure of 12.7 dB,out-of-band IIP3 of 13 dBm and IIP2 of more than 62 dBm.
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